1. Field of the Invention
The present invention relates to a method for setting controller based hardware comprising a plurality of hardware elements and in a further aspect to a controller based hardware device comprising a plurality of hardware elements.
2. Description of Related Art
U.S. Pat. No. 5,081,297 describes a re-configurable signal processing device including a plurality of programmable modules that are re-configurable to perform one of a plurality of selected signal processing functions, such as a time base generator, counter, accumulator, address register, delay circuit, timer. The modules are selectively reconfigured and interconnected by a configuration and control circuit receiving command and control signals from a host processor containing the control software. The programmable modules comprise re-configurable gate arrays.
However, the device as described in U.S. Pat. No. 5,081,297 is very strict with respect to input and output data, and the programmable modules are restricted to performing signal processing functions.
Hardware processors may have a fixed or flexible architecture. A fixed architecture provides a very high performance (speed or data throughput) but is restricted to performing a single algorithm. It is known to use Field Programmable Gate Array's (FPGA) to allow some degree of flexibility, but each different algorithm would require a reprogramming of the FPGA's. Flexible architectures are known using Digital Signal Processors (DSP), but these usually have a lower performance.
The present invention seeks to provide an efficient method and device for controller based hardware, which is an efficient compromise between flexibility of digital signal processors and performance of fixed solutions.